The invention relates to a non-volatile, programmable semiconductor memory with at least one matrix of non-volatile, programmable or conventional memory cells, with a row and/or column of test memory cells added to a matrix of memory cells and with peripheral circuits for selecting and reading the test memory cells in test mode and selecting and reading the normally used memory cells in read mode.
A semiconductor memory of the above-mentioned kind is known from IEEE, 1974 Semiconductor Test Symposium, Memory and LSI, 5-7 November, 1974, Cherry Hill, N.J., United States of America, Digest of Papers, pages 87-110, S. Waser: "What is necessary for testing "ROMs" and "PROMs"?". The known semiconductor memory, or more particularly programmable read-only memory, is provided with a matrix of fuse element memory cells and an extra row and column of varyingly pre-programmed test memory cells.
In this type of PROM the matrix of memory cells must be programmed by the user by, in this case, selectively blowing the fuse elements of the memory cells. For that reason, the producer of these PROMs markets them with all the memory cells intact, or in more general terms, with all the memory cells with the same binary value or in the same logical state, which means that selection circuits of this PROM incorporated in the peripheral circuits cannot be tested in conjunction with the memory elements normally used. For this reason, it is necessary to provide the extra column and row of pre-programmed memory cells, in conjunction with which the selection circuits can be tested.
In the case of an electrically or non-electrically erasable, programmable read-only memory, or EEPROM and EPROM, respectively, the addition of test memory cells is fundamentally unnecessary, because it is automatically possible to test the selection circuits.
What has been found in practice, however, is that since the duration of a test of the selection circuits is determined by the programming time for the memory cells (comparable with the memory cells of the known PROM described above) on, for example, the diagonal of the matrix of memory cells, this duration for the testing of the selection circuits determines the total test time of the semiconductor memory. The addition of (E)EPROM test cells is therefore not a solution since programming then still takes too long.